1. Field of the Invention
The invention relates to a process for the heat treatment of a silicon wafer, and to a silicon wafer produced using this process which is substantially free of vacancy agglomerates (COPs).
2. The Prior Art
Silicon single crystals, which are generally produced using the Czochralski crucible pulling process or using the crucible-free float zone process, have a number of impurities and defects. The single crystals are divided into wafers, subjected to a considerable number of processing steps in order, for example, to obtain the desired surface quality, and finally are generally used for the fabrication of electronic components. If no special precautions are taken, the abovementioned defects are also located at the surface of the wafers, where they may have an adverse effect on the functioning of the electronic components fabricated thereon.
One significant type of defect is what are known as COPs (crystal originated particles), groups of vacancies which combine to form small voids with sizes of typically between 50 and 150 nm. These defects can be measured using numerous methods. Partial etching of the defects by means of a SC1 solution (NH3/H2O2/H2O) at approximately 85xc2x0 C. for 20 min followed by light scatter measurement is one possible option for testing for COPs on the wafer surface. Partial etching of the defects by means of a Secco etch for 30 min, removing approximately 30 xcexcm of silicon, followed by counting, also makes it possible to reveal these defects. If the defects which have what is known as a flag are counted, they are referred to as FPDs (flow pattern defects). The result obtained is an FPD density per unit area, which can be converted into a density per unit volume taking account of the material removed during the preparatory etch. The same defects can also be measured by means of IR-LST (infra-red light scattering tomography), in which an Nd-YAG laser beam is scattered at the defects in the silicon wafer and the scattered light is detected at an angle of 90xc2x0 to the laser beam. These defects are referred to as LSTD defects after their measurement method.
Numerous component parameters are adversely affected by the COPs when components are being fabricated on the semiconductor wafer. Therefore, it is necessary for these defects to be removed at least in the layer of a silicon wafer which is active in terms of the components. According to the prior art, there are three possible ways of achieving this objective:
By maintaining an accurately defined process window during the crystal pulling, it is possible to produce a single crystal which is free of vacancies and therefore also free of vacancy agglomerates (COPs). On account of the low pulling rate in a range  less than 0.5 mm/min, however, the pulling of the crystals entails considerable costs. Furthermore, the tight process window leads to low yields, which likewise has adverse effects on the economic viability of the process. A further drawback of the silicon produced in this way is that it does not have a gettering capacity on account of the absence of vacancies. The relationship between vacancies, interstitial oxygen and the gettering capacity of a silicon wafer is described in more detail in G. Kissinger et al., Electrochem. Soc. Proc. 98-1 (1998), 1095.
As an alternative to producing a COP-free single crystal, it is possible for an additional silicon layer to be epitaxially deposited on the surface of a silicon wafer which includes COPs. On account of the low growth rate during the deposition, an epitaxial layer, unlike a conventional single crystal produced using the Czochralski process, has a virtually perfect crystal structure and is usually free of COPs. The deposition of an epitaxial layer is a complex process step which makes the product significantly more expensive. Furthermore, many component processes require silicon wafers which are defect-free at the surface down to a depth of at least 10 xcexcm. Depositing such a thick epitaxial layer is very time-consuming and therefore uneconomical.
The third alternative consists in exposing a silicon wafer which has been produced from a conventional single crystal to temperatures of 1200xc2x0 C. or higher for one to two hours under an argon or hydrogen atmosphere, as described, for example in EP 829 559 A1. Numerous tests show that COPs at the wafer surface are then annealed, resulting in a COP-free layer close to the surface. However, the annealing process is time-consuming and therefore expensive.
Silicon carbide bolts are required to hold the wafers during the annealing process at the high temperatures of over 1200xc2x0 C. This always entails the risk of metal contamination. Metals which are bound in the silicon carbide can easily be distributed through the process chamber as a result of the procedure being carried out at 1200xc2x0 C. under argon or hydrogen, and as a result can reach the silicon wafer.
Both in the case of epitaxy and in the case of COP free palling, the nucleation centers for oxygen precipitation which are typically formed during the crystal pulling are reduced in such a manner that there are insufficient nucleation centers available in the subsequent component process. Therefore it is impossible for getter centers to grow in sufficient numbers.
This problem can be solved with the aid of an RTA (rapid thermal annealing) treatment, as described for example in WO 98/38675 or DE 199 24 649 A1. At the high temperature, a large number of vacancies are formed and during the subsequent rapid cooling they can only diffuse to the surface in regions which are close to the surface, whereas in the bulk of the silicon wafer they are retained. Therefore, anomalous oxygen precipitation, which is in turn responsible for getter centers, may take place during the subsequent component process. However, this additional RTA treatment in turn increases the production costs of the silicon wafer.
U.S. Pat. No. 6,245,311 describes a method of reducing the COP density at the surface of the silicon wafer by means of a multistage RTA process. An RTA treatment is preferable to a batch process in terms of time and throughput. The various steps, which are carried out at different temperatures and under different atmospheres, are necessary in order to counteract the roughening of the wafer surface resulting from the use of a hydrogen-containing atmosphere.
EP 1 087 042 A1 describes a nitrogen-doped single crystal in which the COPs have a particular form. On account of the large surface area/volume ratio, the COPs can be eliminated in a layer close to the surface of a silicon wafer produced from the crystal, down to a depth of approx. 0.5 xcexcm. This is by means of an RTA step, so that the COP density in the surface layer is reduced to approx. 50% or less of the COP density in the bulk of the wafer.
EP 926 718 A2 has described a conventional RTA process at temperatures over 1200xc2x0 C. in a reducing atmosphere, e.g. in a hydrogen-containing atmosphere, for dissolving the COPs close to the surface. However, the starting material used is silicon wafers which have been produced from a single crystal which has been pulled under special conditions using the Czochralski process. The single crystal is pulled at a rate of at least 0.6 mm/min and has an oxygen concentration of at most 16 ppma (corresponds to 6.4xc2x71017 at/cm3). On account of the process parameters selected, the COPs formed during the crystal pulling are relatively small and can therefore be dissolved easily during the RTA step.
All the processes for the heat treatment with a view to eliminating COPs which have been disclosed hitherto are based on the diffusion of oxygen out of the surface layer of the silicon wafer. The oxygen atoms of the oxide skin of the COPs are in equilibrium with the interstitial oxygen atoms which have been incorporated in the crystal lattice. These atoms in turn are in equilibrium with the native oxide layer at the surface of the silicon wafer. If, as is customary in the case of COP annealing, the wafer is exposed to a reducing atmosphere at high temperatures, the surface oxide layer is removed by reduction. On account of the equilibria described, the interstitial oxygen atoms diffuse out of the crystal toward the surface. At the same time oxygen atoms diffuse out of the oxide skin of the COPs into the crystal lattice, so that the oxide skin of the COPs is dissolved. The COPs from which the oxide skin has been removed are in turn in equilibrium with vacancies in the crystal lattice, which likewise diffuse toward the wafer surface. Consequently, this leads to the COPs being dissolved.
Since the said diffusion processes take place very slowly, COPs can only be removed from the surface layer within a reasonable period of time. This is disadvantageous in particular in components which require a particularly deep COP-free layer at the surface. For example in the case of components in which deep trench technologies are used, COP-free layers are produced on the silicon wafer. Hitherto, the maximum depth of the components has been limited to the thickness of the COP-free layer.
Moreover, outdiffusion of oxygen can only be achieved in reducing atmospheres, but these roughen the surface and lead to contamination problems, as described above.